A New Multilevel Inverter Topology with Component Count Reduction

Document Type: Original Article


Department of Electrical Engineering, University of Zanjan


Multilevel inverters as a main component of electrical systems have been discussed over the past decade. Todays, improving their performance is one of the important challenges that has led to many studies in their topology and control system. In this paper, a new topology of symmetrical multi-level inverters is provided that is able to feed inductive loads. The proposed topology has fewer power elements such as IGBTs, driver circuits, diodes and dc voltages. To increase the number of output voltage levels, several basic topology can be in cascaded structure. Comparison of proposed inverter topology with some conventional symmetrical topologies shows that the proposed topology has better efficiency in aspects of the number of IGBTs, losses and blocked voltage blocked in the switches. The performance and efficiency of the proposed inverter are verified by simulation and experimental results of a 9-level symmetrical inverter.The quality of a multi-level inverter specifies by its number of output levels.


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